The invention pertains to the field of RFID tag structures and methods for constructing RFID tags.
RFID tags are passive transceivers which are small, integrated and have RF or electromagnetic receive and transmit capabilities but no batteries (some tags have batteries and these are referred to as active tags with the no battery class referred to as passive tags). Power for the internal operations of a passive tag in receiving RF inquiry transmissions, storing data, reading data and RF reply transmissions is generated by rectifying a received RF inquiry transmission. Such RFID tags have many internal memory cells that can be read only (ROM), write-once-read-many (WORM), or fully rewritable memory such as EEPROM. As such they can store much more data than can be recorded on a bar code tag, and they can have the data recorded thereon changed. Such properties are useful in such environments as tracking of packages for UPS or Federal Express type couriers services, inventory of the contents of pallets (multiple RFID tags can be read simultaneously), tracking baggage in airline operations determining whose bags are on a cart or in a baggage compartment etc. The RFID technology disclosed herein is good for these applications as well as for use in smart cards.
The possible uses of RFID tags are numerous and varied, but one barrier to their use is their expense. Typical RFID tags require an antenna to be formed on a plastic substrate, an RF transceiver and memory circuit to be built in integrated circuit form and then the IC is bonded to the plastic substrate and connections between the IC and the antenna connection pads are wire bonded. Some antennas in the 125 kHz operating frequency band require about 200 turns, whereas antennas for the 13.56 Mhz band require only 4 turns. Antennas can be wire wound, etched photolithographically or silk screened on the substrate. Longer antennas created by the wire winding process give greater operating range, but the wound coil antenna process is typically also the most expensive prior art antenna process.
The most expensive part of the overall RFID process is making the IC itself with costs ranging from between ten and fifty cents. The cost of the wire bonding process is the next most expensive part of the overall process followed by the cost to fabricate the antenna.
In order for RFID tags to become commercially successful with volume in the billions of units per year, the cost of the total tag must be brought down to 5 cents or lower per tag. To reduce costs to this level, the current process for fabrication and the resulting construction cannot be used.
The current form of RFID tag construction is too expensive, and it has reliability problems in high temperature applications. The reliability problems in high temperature applications arise out of the differences in thermal coefficient of expansion between the bulk silicon of the IC substrate and the plastic substrate on which the antenna is formed. The difference in coefficients of expansion lead to stresses in the structure which can fracture the chip or break the wire bond between the transceiver and the antenna. The current separately formed chips are also too expensive. Finally, the structure of prior art RFID tags which have an integrated circuit bonded thereto is not monolithic. This results from the fact that the IC containing the transceiver is about 0.5 mm thick whereas the plastic substrate on which the antenna is formed is much, much thinner. This can be a problem in some applications where, for example, the RFID tag is to be run through a printer to have bar code printed on top of the RFID tag to act as a backup source of information about an article to which the tag is attached.
Therefore, a need has arisen for a structure for an RFID tag which can be made more inexpensively, which is subject to fewer reliability problems by virtue of elimination of the differences in coefficients of thermal expansion, and which has a more planar profile than the prior art RFID tag structures.
The teachings of the first two classes of embodiments of the invention are equally applicable to both RFID tags and smart cards with RF transponder/processor/memory circuits integrated directly onto the same plastic substrate on which the antenna is formed. Typically the antenna will have two terminals for connection to the RF input/output terminals of the integrated circuit, but in some embodiments, there may be only one terminal for the antenna that is connected directly to the IC with the other terminal connected to a ground plane of conductive material formed on the plastic substrate with the IC having one RF I/O terminal coupled to the antenna and the other coupled to the ground plane. The phrase xe2x80x9cintegrated onxe2x80x9d as used in the claims means an integrated circuit that is formed directly on the plastic substrate by processing the plastic substrate in flat panel display manufacturing or other semiconductor wafer processing machines used for making integrated circuits. The phrase xe2x80x9cbonded or otherwised attached toxe2x80x9d is intended to describe a plastic substrate upon which is bonded an integrated circuit made on another glass or plastic substrate elsewhere which is then diced and bonded or otherwise physically attached to the plastic substrate.
The ICs that are used to control toys and other equipment that requires cheaply constructed integrated circuits may also be made using the teachings of the invention.
Preferably, the ICs are fabricated on the plastic substrate using the semiconductor processing machines which are used to form thin film transistors at multiple locations on large plastic or glass substrates which are used in manufacture flat panel displays for televisions and computers. These machines operate under the control of data in process configuration or recipe files that define the process temperatures, gas types and composition, RF energy levels etc. that together are the selected one of the process recipes defined herein which are compatible with the substrate selected for the RFID tag or smart card so as not to melt, warp, deform, chemically attack or otherwise damage the substrate. It is easiest to tell the flat panel manufacturing machine manufacturer at the outset which gases are to be used. That way the machine is configured at the factory with the proper gas flow controller since each gas has its own density, and requires a unique flow controller to make sure the right amount of gas is added to the process. However, existing flat panel manufacturing machines can be retrofitted for new gases by changing the flow controller and removing all the old plumbing from the gas supply through the flow controllers to the deposition chambers so that residues of gases previously used in the machine are not inadvertantly added to the process.
In a separate class of embodiments, the ICs are fabricated by the thousands or millions on large plastic or glass substrates using the thin film transistor processing machines used in the flat panel display business, as modified to use process recipes compatible with the substrate selected. xe2x80x9cLargexe2x80x9d as that term is used herein means larger than the largest diameter semiconductor wafer capable of being processed with the current generation of semiconductor processing equipment.
The invention of the first two classes of embodiments achieves three advantages over the prior art simultaneously. First, by integrating a large number of separate RFID tag transceivers onto large plastic substrates which have a matching number of antennas integrated thereon and dicing the substrate up into individual RFID tags or smart card internal circuits, large cost savings are achieved. This is because the manufacture in bulk of the integrated circuit, which is the largest cost component, saves money on a per unit basis. With the IC formed directly on the same substrate as the antenna, the costs in the prior art process of dicing up the semiconductor wafers into individual transceiver ICs is saved as is the cost of die bonding, wire bonding and flip-chip bonding. Second, reliability is increased. This is because the IC is formed on the same substrate as the antenna and there is a special coating on the plastic substrate to prevent mismatches in the coefficients of thermal expansion that caused differential strain in the prior art. This differential strain occurred at high temperatures and led to failures of prior art tags used in high temperature applications such as inside ovens. As used in the claims, the phrase xe2x80x9clittle or no differential strain between the substrate and said layer occurs in the normal operating temperature range of said integrated circuitxe2x80x9d means not enough difference in the strain between the strain in the substrate at a given temperature and the layer of oxide, nitride or other material coated over the substrate occurs to cause fractures or stress that cause immediate or eventual reliability problems or failure of the circuit.
Finally, the resulting structure with the IC integrated directly on the plastic substrate as the antenna is much more planar than the prior art die bonded structures. This eliminates certain problems experienced with prior art tags which needed to be flat such as where the tag needs to be run through a printer so that a bar code can be printed thereon.
The teachings of the invention in third and fourth classes of embodiments are also useful in RFID tags and smart cards, but are more useful in manufacturing of cheap ICs on plastic substrates for mass produced smart toys etc.
In a first class of embodiments, a polyester, PVC or polyimide or other plastic substrate has formed thereon a layer of silicon nitride or silicon dioxide. Hereafter, this layer will be referred to as the nitride layer, but this terminology is to be interpreted as meaning the layer is made of silicon nitride, silicon dioxide or any other material that can be formed in such a thickness and has appropriate properties to reduce or eliminate the thermal coefficient of expansion mismatch reliability problem that is found in high temperature applications. The nitride layer serves to reduce or eliminate the reliability problems cause by mismatches in the coefficient of thermal expansion between the nitride layer and the plastic substrate on which the transceiver is formed. The key to eliminating the reliability problems at high temperatures is to avoid substantial mismatches in the amount of strain that occurs at a given temperature between the plastic substrate on which the transceiver is fabricated and the nitride layer that insulates the substrate from the transceiver circuitry. The amount of strain that occurs in a material in thermal expansion is a function of its Young""s Modulus, the temperature and its geometry, especially its thickness. The trick then is to establish the thickness of the nitride layer (or whatever other material is chosen) so as to establish a xe2x80x9cstrainxe2x80x9d value which substantially matches within about 5-10% or, preferably, exactly the strain value of the underlying plastic substrate at the same temperature given the geometry and material of the substrate.
In the first embodiment, after forming the antenna, optionally a layer of silicon dioxide is formed over the silicon nitride layer to act as an insulator. It is possible to use the silicon nitride strain matching layer as the insulator without adding the additional layer of oxide. Then a layer of amorphous, polycrystalline or microcrystalline silicon is formed over the silicon dioxide insulator layer. This layer of semiconductor is then processed by low temperature thin film integrated circuit processing steps detailed in the patents to Lawrence Livermore Laboratory to form thin film transistors on the plastic substrate. These transistors are organized into an RF transceiver section, a processor section and memory cells to store data. The memory cells can be static RAM if a battery is bonded to or integrated onto the tag to make it an active tag or they may be EEPROM cells for nonvolatile storage.
After the transceiver is formed, a layer of silicon dioxide is formed over the top of the integrated circuit. The silicon dioxide layer is then masked and etched to form two via holes through the silicon dioxide layer to two RF input/output terminals of the circuitry of the RFID tag. Finally, a layer of copper is sputtered or otherwise deposited over the layer of silicon dioxide so as to cover the entire surface of the substrate and so as to enter the via holes and make electrical contact with the RF terminals of the transceiver. This layer of metal is then patterned and etched photolithographically to form several windings that wind around the circumference of the plastic substrate to form what is essentially a coiled dipole antenna.
The cost of making the integrated circuit is held down by using the known flat panel display manufacturing machinery to make huge numbers of ICs in each batch. These machines are used to make the thin film transistor structures in amorphous silicon deposited on the glass or plastic substrate of large flat panel displays used in laptop computers and other appliances. This allows huge numbers of RFID tags to be simultaneously manufactured thereby reducing the cost per chip. In some embodiments, the large plastic substrates can be processed in localized areas where the IC transistors are to be formed in amorphous semiconductor which has been locally deposited using shadow masks. In other embodiments, the layers of semiconductor, silicon dioxide, metal etc which need to be deposited to form the IC circuit can be deposited over the entire plastic substrate and then etched back to form individual ICs connected to antennas integrated on the same e substrate. These flat panel manufacturing machines are modified to use the process recipes defined in the patents to University of California, Livermore Labs, IBM and other companies for making thin film transistors on plastic substrates so that no process step is carried out at a temperature which is higher than the melting point of the substrate (xe2x80x9cmeltingxe2x80x9d as the term is used herein and in the claims means reaching the glass transition temperature or reaching a temperature where there is significant shrinkage or deformation of the plastic substrate). The flat panel machines are capable of making thin films of silicon dioxide, silicon nitride, amorphous silicon, and laying down and etching metalization patterns. They are also capable of doing excimer laser annealing of doping layers deposited by PECVD on top of amorphous silicon and pulsed excimer laser crystallization of amorphous silicon to form polysilicon.
A second class of embodiments has the transceiver integrated directly on the substrate with the antenna and with the IC integrated over the antenna. This class of embodiments will be referred to as the xe2x80x9cupside downxe2x80x9d embodiments and is actually the preferred form. In this class of embodiments, after forming the nitride layer on both surfaces of the plastic substrate, a layer of metal is deposited on top of the nitride layer and etched to form two leads from two antenna connection pad locations to RF output locations of wherever the TFID transceiver is to be formed. Next, if the antenna metal is to be some metal such as copper which has a different electrical potential than the metal such as aluminum used for the leader lines, a silver or conductive epoxy contact pad is deposited and etched at the contact pad junction where the two dissimilar metals will be put into electrical contact with each other. This prevents electolytic current based corrosion from destroying the contact junction.
Next, the antenna is formed on top of the silicon nitride or silicon dioxide layer and on top of the contact pads at the end of the leader lines. In some embodiments, the antenna can be formed below the layer of metal upon which the leader lines are formed and above the nitride layer.
Formation of the antenna can be done by any one of the three prior art methods but usually by either the photolithography or silk screening processes. In the silk screening process, the metal of the antenna terminal portions is simply printed over the contact pads. If photolithography is used, a layer of insulation such as silicon dioxide may need to be formed over the leader lines with vias etched through to the contact pads. The preferred method for forming the antenna is by sputter deposition or electroplating of copper and photolithographic etching to form an antenna that wraps around the top surface of the plastic substrate to make a series of planar loops with terminals at the contact pads at the end of the leader line. If the antenna is formed below the layer upon which the leader lines are formed a layer of insulation is formed over the antenna and via holes are etched down through it to the antenna terminals.
After forming the antenna, a layer of silicon dioxide is deposited and etched back to form an insulating layer over the leader lines with via holes down to the leader lines where the RF outputs of the RFID transceiver are to be formed. For purposes of illustration of the upside down process, assume these via holes will form connections between the source and drain regions of an upside down thin film transistor and the leader lines.
Next, a layer of metal is deposited over the silicon dioxide layer and etched back to remove all the metal except that filling the via holes. Then a layer of amorphous silicon or microcrystalline silicon is deposited so as to form a layer of semiconductor material covering the regions where the vias are located. In embodiments where greater speed of operation of the transistor are required, this silicon can be crystallized to polysilicon by the pulsed laser process described in a paper and several patents by scientists at Lawrence Livermore National Laboratory.
Next, a layer of silicon dioxide is deposited by low temperature chemical vapor deposition to form the gate oxide. Then a layer of aluminum or other metal is deposited over the gate oxide layer. These two layers are then etched back to define the gate and gate oxide island of the thin film transistor. This exposes the underlying semiconductor layer at locations outside the island. The source and drain regions of the transistor are then formed by doping the semiconductor layer using low temperature chemical vapor deposition.
The resulting structure is then photolithographically etched back to define a localized integrated circuit thereby defining the boundaries of each transistor formed in the semiconductor layer. Finally, a layer of silicon dioxided is deposited over the entire substrate, and via holes are etched therein to make contact with the gates drains and sources of the various transistors where necessary to form the actual RFID transceiver circuit to be used. A layer of metal is then deposited and photolithographically etched to fill the via holes and make the necessary interconnections between the transistors to form the processor, memory array and RF transceiver circuits of the RFID tag.
Another class of embodiments is defined by the following characteristics. First, inexpensive RFID tag ICs comprised of thin film transistors on plastic substrates are fabricated in bulk using the huge volume flat panel display fabrication machines which are in public use here and in the far east to make flat panel displays for televisions and computers. These machines are modified in the manner described above in the summary to use the low temperature processes defined in the various patents and papers authored by scientists at Lawrence Livermore National Labs, IBM and others to make thin film transistors on plastic substrates.
After formation of thousands or hundreds of thousands of individual RFID tag transceiver ICs on one big plastic substrate, the substrate is cut up into individual ICs. These are bonded to another plastic substrate upon which the antenna is formed using conventional methods.
Next, the RF output terminals of the RFID tag transceiver are wire bonded to the antenna connection pads and the structure is complete. Although this class of embodiments is not as flat as the first two classes of embodiments and does not eliminate the expense of the wire bonding process, it does solve the major problems of cost and reliability in high temperature embodiments. As such, the processes and structure of the IC on a plastic substrate are useful in many other applications where cheap ICs are needed (such as toys) in addition to smart cards and RFID tags. The particular IC circuitry manufactured can be changed by changing the masks, so the advantage is to be able to make these ICs on plastic substrates by the hundreds of thousands using the flat panel display manufacturing machines and the processes developed by Lawrence Livermore Labs, IBM and others for making thin film transistors on plastic substrates. Because the ICs are manufactured in huge lots on plastic substrates, the cost of each IC goes down drastically. Further, because the RFID tag IC is built on a plastic substrate which can be the same material as the plastic substrate upon which the antenna is formed, there is no mismatch in the coefficients of thermal expansion which lead to reliability problems in high temperature environments.
Another alternative class of embodiments similar to the class just described uses low cost RFID tag transceivers fabricated as thin film transistors on glass substrates. These low cost RFID tag transceivers are fabricated as thin film transistor technology using the same processing steps and the same machines as are used in the flat panel manufacturing processes without the need for changes to the machine configuration or the processing temperatures used. Because they can be manufactured by the hundreds of thousands on large glass substrates as opposed to by the thousands on 6 or 8 inch semiconductor wafers, the cost per unit drops dramatically. These glass substrates are then cut up into individual ICs and bonded onto plastic substrates upon which antennas have been previously fabricated. The RF outputs are then wire bonded to the antenna terminals. This class of embodiments does not eliminate the cost of the wire bonding and is not monolithically flat, but the cost of the completed tag is much lower than the prior art tags because of the lower IC fabrication costs. Substrate sizes in flat panel processing with either glass or plastic are currently up to one meter by one meter. This size substrate can yield up to one million RFID tag transceiver ICs, and this will drastically reduce the cost of the ICs. Since the IC cost are the majority of the overall cost of the RFID tag, this process will substantially reduce the overall cost of the tag. This class of glass substrate embodiments will also be subject to the reliability problems of the prior art in high temperature applications because of the mismatch in the coefficients of thermal expansion between the glass substrate of the RFID tag transceiver and plastic substrate upon which the antenna is formed.